1. Field of the Invention
The present invention relates to an apparatus for manufacturing a semiconductor device, a method of manufacturing a capacitor of a semiconductor device thereby, and a resultant capacitor. More particularly, the present invention is directed to an apparatus for manufacturing a semiconductor device for stabilizing a hemispherical grained (HSG) film formed over the semiconductor substrate in order to increase the capacitance of the capacitor so as to prevent the abrasion of the HSG film due to the cleaning for the HSG film after its formation, a method of manufacturing a capacitor of a semiconductor device thereby, and a resultant capacitor having a stabilized HSG film.
2. Description of the Related Art
Since semiconductor memory devices are becoming more highly integrated, and the sophistication and capacity of the devices increase, there are ongoing efforts to keep the devices as small as possible for subsequent implementation in miniature electronic products while satisfying the demand for the increase of the capacitance of the device. In view of this desire to obtain smaller devices and greater capacitance thereof, the space of each memory cell must be reduced accordingly.
Generally, each memory cell unit of a DRAM (Dynamic Random Access Memory) is composed of a transistor and a capacitor. Even with the reduced cell size as described above, the memory device must still have a sufficient minimum threshold capacitance in order to function properly. A semiconductor capacitor includes a lower electrode (storage electrode) and an upper electrode (plate electrode), with a dielectric material between the two electrodes.
There are several types of capacitors produced to increase the capacitance thereof as high as possible. An example of such a capacitor is a trench capacitor, which is made by cutting deeply into a semiconductor substrate. Another example is a stack capacitor, which obtains sufficient capacitance by making the structure of the capacitor complicated, i.e., fin-shaped or cylinder-shaped, so as to increase the surface area rather than by forming a deposition structure, which may result in a high step-height.
The memory capacitance of the DRAM device generally depends on the lower or storage electrode of the capacitor. Therefore, various methods have been proposed to increase the capacitance of highly-integrated semiconductor devices including the formation process of its lower electrode, and the following processes. For example, a dielectric material, such as TiN and Ta.sub.2 O.sub.3, etc., with a high permittivity maybe deposited after etching a polysilicon film of the lower electrode. Alternatively, the surface area of the capacitor may be increased by changing the manner of etching a polysilicon film of the lower electrode.
However, the increasing of the surface area of the capacitor is achieved using the properties of the material of the lower electrode itself rather than by improving the dielectric film or by altering the structure of the lower electrode, as described above. Such an increase of the surface area of the capacitor may include forming polycrystalline hemispherical grained (hereinafter referred to as HSG) with a roughened surface on the exposed surface of the lower electrode. One grain of the HSG is 500 to 1000 .ANG., and can double the capacitance of the normal capacitor.
FIG. 1 shows conventional process sequences of the method of manufacturing a capacitor of a semiconductor device. As shown in FIG. 1, after forming contact holes on a specific structure being composed of a nitride film or an oxide film on a semiconductor substrate, and depositing amorphous silicon film, a photo-etch process is carried out so as to form at step S2 a desired pattern of the lower electrode of the capacitor of the semiconductor device. The lower electrode contacts the source area of the transistor through contact holes, and stores information according to the charges transferred from the source area. The oxide film formed on the semiconductor substrate is an intermediate insulating layer.
Then, a HSG film is formed on the lower electrode by step S4, wherein a surface of the lower electrode composed of the silicon is formed as hemispherical-shape, its surface energy being stabilized at a temperature of the phase transition of the amorphous silicon (a-Si) and the polycrystalline silicon by the migration of the silicon.
The HSG film is formed by conventional chemical vapor deposition (CVD), for example, low pressure chemical vapor deposition (LPCVD). That is, after maintaining a process chamber at a temperature of 550.degree. C., a silicon-containing gas, e.g., Si.sub.2 H.sub.6 or SiH.sub.4 having a high surface reactivity is injected into the process chamber so as to form a nucleus on the surface of the lower electrode. By applying a thermal treatment thereon, the surface is roughened and a hemispherical-shaped HSG is formed by the thermal migration of the nucleus. In addition, the HSG formed as described above is turned into polysilicon by the diffusion of the phosphorus after forming the HSG. As a result, the HSG has a surface area two or three times that of a flat surface over the same region.
FIG. 2 is a SEM image showing the surface state of the HSG formed on the surface of the lower electrode after step S4. As shown in FIG. 2, hemispherical grain is well-formed on the surface of the lower electrode.
Then, the semiconductor substrate having the HSG formed thereon is cleaned by a step S6, to remove a native oxide film formed during the above process. The native oxide film has a low permittivity, thus greatly decreasing the capacitance of the capacitor, and causing a malfunction during the subsequent formation of the dielectric film. The removal of the native oxide film is carried out using Standard Chemical-1 (SC-1) cleaning solution by means of a wet-etch process.
FIG. 3 is a SEM image of the HSG after cleaning the HSG of the FIG. 2 using SC-1 for 10 minutes. The surface area of the HSG shown in FIG. 3 is sharply reduced because the hemispherical-shaped protrusion thereof is significantly removed compared with the state of the HSG shown in FIG. 2. The surface area of the HSG shown in FIG. 3 is reduced by 50% compared with the surface area shown in FIG. 2.
The reduction of the surface area of the HSG is proportional to the cleaning time. However, if the cleaning time is reduced, the contaminants on the surface of the HSG, i.e., the non-uniform native oxide film, etc. are not completely removed. Failure to completely remove the contaminants affects the uniformity of the dielectric layer to be deposited later and/or increases the resistance and the stress between layers, thereby generating a leakage current.
Then, a dielectric film is formed by a step S8, wherein a nitride-oxide film (NO film) is deposited on the HSG having passed through the cleaning process.
Then, an upper electrode is formed by a step S10, wherein polysilicon, which serves as the upper electrode, is deposited on the dielectric film.
The conventional method of manufacturing a capacitor has a serious problem as described above. That is, as illustrated in FIGS. 2 and 3, showing the SEM image of the surface of the HSG after the deposition and after the cleaning, respectively, the surface of the HSG is significantly worn by the cleaning, thereby reducing the surface area.
The hemispherical shape is formed during the formation of the HSG film because of the migration of the silicon. The amorphous silicon is turned into crystalline silicon. However, the resultant crystalline structure has a short-range order rather than a long-range order. As a consequence of this unstable crystalline structure, the surface of the HSG is worn down during the cleaning process for the removal of a native oxide film by a cleaning solution, for example, a Standard Chemical-1 (SC-1).
Therefore, the decrease of the surface area of the HSG due to the abrasion of the HSG results in the decrease of the capacitance of the capacitor, which is contrary to the desired demand for the sufficient capacitance while reducing the size of the capacitor.